1. Field of the Invention
The present invention relates to a semiconductor device such as a dynamic random access memory (DRAM) and a manufacturing method for the same.
2. Description of the Related Art
In recent years, the density and speed of semiconductor devices have become increasingly greater and the manufacturing process for DRAMs has accordingly required more steps and become more complicated, making the manufacture of DRAMs difficult. With this increasing trend toward higher density and higher speed, it has become extremely important to accomplish an easy manufacturing method for producing inexpensive devices with high yield.
FIG. 5 shows an example of a conventional DRAM. The DRAM shown in FIG. 5 has a p-type semiconductor substrate 1, an oxide film for a device isolation 2, which has been formed by local oxidation of silicon (LOCOS), a gate oxide film 3, a gate electrode 4 composed of poly-silicon (polycrystalline silicon), and an oxide film 5 formed by chemical vapor deposition (CVD).
A source 6a and a drain 6b of a MOS transistor of a memory cell are both composed of an n-type semiconductor region. There are also provided an oxide film 7, which has been produced as a side wall film by the CVD, a bit line 8a of the memory cell, and a redundant fuse 8b for relieving a defective memory cell, both 8a and 8b being comprised of a conductive film made of tungsten (W) polycide.
The DRAM further includes an oxide film 9 formed using CVD, a poly-silicon 10 which has been formed using low pressure CVD and which provides a storage node, and a poly-silicon 11 which has been formed using low pressure CVD and which provides a cell plate. An ONO film serving as a capacitance insulating film of a capacitor is provided between the storage node 10 and the cell plate 11 although it is not shown in FIG. 5.
Further included in the DRAM are an oxide film 12 produced using CVD, an aluminum (hereinafter referred to as "Al") electrode wiring 13 of the first layer, an oxide film 14 formed using the spin-on-glass (SOG) process or the etchback process or the like, an Al electrode wiring 15 of the second layer, a silicon nitride film 16 formed as a protective film by using plasma CVD, and a cavity 17 formed above the redundant fuse 8b.
In the conventional DRAM, as illustrated in FIG. 5, a conductive film formed using the W polycide has been used as the redundant fuse 8b for relieving a defective memory cell. An extremely thick multilayer insulating film composed of the films 9, 12, 14, and 16 is formed on the redundant fuse 8b. To make the redundancy relief easier, it has been required to etch a major part of the insulating films 12, 14, and 16 and leave only insulating film 9 of approximately 200 to 400 nm on the redundant fuse 8b in a final step. This has been required to allow a defective memory cell to be replaced with a nondefective memory cell by cutting off the redundant fuse 8b.
For this reason, it has been important to form on the redundant fuse 8b the insulating film, namely, the oxide film 9, which is thin but is not so thin that the W polycide is exposed, so as to permit easy disconnection of the redundant fuse 8b. Since the multilayer composed of the different types of insulating films, namely, 9, 12, 14, and 16, is formed on the redundant fuse 8b, it has been extremely difficult to stably etch these insulating films 9, 12, 14, and 16 with good control. Accordingly, the redundancy relief yield has also been low.